Semiconductor devices such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used in power electronics applications due to their appreciable current carrying and off-state voltage blocking capability with low on-state voltage drop. In terms of industrial applications, power MOSFET devices are commonly used in many electronics fields such as portable electronics, power supplies, telecommunications and, especially, in many industrial applications relating to automotive electronics, particularly, but not exclusively, as switching devices.
Typically, a power MOSFET has a structure extending in the depth of a substrate in which a source, a base surrounding the source and a drain are of alternating p-type and n-type doping and an insulated gate layer is provided at the surface of the substrate. If the source and drain are n-type, and the base is p-type, for example, by applying a voltage higher than a threshold level which biases the gate positive with respect to the source, an n-type inversion layer or channel will be formed under a gate oxide insulating layer between the surface of the substrate and the gate thus forming an electrical connection between the source and the drain regions and allowing a current to flow in an on state of the device. Once the device is turned on, the electrical drain-source resistance is referred to as the on-state resistance (RDSON) and should be as low as possible, especially in a switch device. High cell density vertical insulated gate FET (IGFET) devices, for example, with a cell density of several hundred thousand cells/cm2, offer a particularly low on-state resistance per unit area at a low unit cost.
In the off-state, the voltage blocking capability is limited by the breakdown voltage. Typically, the design of a MOSFET device addresses the electrical isolation issue by arranging for each base cell region to be electrically isolated in an epitaxial layer. Ideally, all base regions should be at the same electrical potential in order to get a good snap back immunity while improving the breakdown voltage, likewise increasing the unclamped inductive switching (referred to as UIS) capability. To a large extent, the parameters favourable to high breakdown voltage are unfavourable to low on-state resistance.
Generally speaking, a need exists for further improving the compromise between on-state resistance and breakdown voltage, with a good electrical contact to a unique base region so as to guarantee the high energy capability (UIS), which need patent specification EP 02 291 458.4 addresses.
US patent specification U.S. Pat. No. 6,037,632 describes a MOSFET device in which, within the drain region of the substrate and parallel to its surface, a layer of opposite conductivity type is buried, comprising a plurality of strips functioning as current paths and set at a potential different from the electrodes of the device when a depletion layer reaches them.
Other semiconductor devices also are subject to compromises between on-state resistance and breakdown voltage. For example, international patent specification WO 01 78152 describes a Schottky diode device in which islands of opposite conductivity type are buried in a layer of a substrate in ‘beds’ spaced apart in the thickness of the layer. The article “Ultra Low On-Resistance SBD with P-Buried Floating Layer” by Wataru Saitoh, Ichiro Omura, Ken'ichi Tokano, Tsuneo Ogura and Hiromichi Ohashi published by the IEEE under the reference 0-7803-7357-X/02/$17.00 2002 IEEE also describes a Schottky barrier diode (SBD) structure with a buried electrically floating layer of opposite conductivity type and in the form of stripes or dots.
However, it is found that, in each of these cases, the solution proposed is sub-optimal as regards breakdown voltage.